[Operator Mechanism] Add comment for sufficient big tensor IndexT guards (#79700)

* [Operator Mechanism] Document why int32 index guards are sufficient in GPU kernels

Add comments next to the int32/int64 index dispatch guards explaining which
index expression bounds the check, covering elementwise grad broadcast,
reduce, transpose permute, where grad, isclose/isfinite and weight quantize.
Comment-only change, no behavior change.

* fix

* cut the comment in PermuteAndTranspose

* add explicit guard for index in ReduceHigherDimKernel